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AffiliationUniversity of Michigan-Shanghai Jiao Tong University Joint Institute, Shanghai Jiao Tong University
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Approximate multiplier is a fundamental arithmetic block for designing energy-efficient systems, which can be realized by approximate 4-2 compressors. However, the prior works all design approximate 4-2 compressors manually, so the optimality of the circuits cannot be guaranteed. In this paper, given any input distribution and error bound, we propose MinAC, an exact synthesis-based method to automatically produce minimal-area approximate 4-2 compressors. To directly obtain an area-optimal circuit in a realistic gate library, gates with multiple outputs are taken into account during the exact synthesis. The experimental results show that compared with the existing methods, MinAC on average can produce approximate 4-2 compressors with 39.8%, 44.2%, and 7.9% reduction in area-delay-product, power-delay-product, and mean error distance, respectively. The library of the approximate 4-2 compressors synthesized by MinAC is available at XXX.