Details
Presenter(s)
![Saito Shibata Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/63351.jpg?h=2c4e73f8&itok=aK0n9FRD)
Display Name
Saito Shibata
- Affiliation
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AffiliationThe University of Tokyo
- Country
Abstract
A pad-less 5GHz RFID employing complementary pass-transistor adiabatic logic is proposed. The power clock that drives the whole CPAL is improved to enable a smaller input RF power and higher speed data frequency by using a power clock shaper which pulls the power clock to GND when a falling edge is detected. Additionally, a new CPAL circuit exploiting both the threshold voltage and W/L of the transistors is proposed. Measurements confirm that the proposed RFID can communicate at a distance of 11cm with 12dBm transmission power, as well as at a 100kbps data rate across a distance of 1cm.