In this paper, we propose a feasible architecture with high precision and low resource consumption to compute the Nth root of a floating-point number, which is mainly based on radix-4 SRT and 2-based Coordinate Rotation Digital Computer (CORDIC). Our method can achieve a relative error of the magnitude of 10^−7 and superior performance in terms of area, power, and absolute delay. Synthesized under the TSMC 40nm CMOS technology, our design can achieve the highest frequency of 3.12 GHz with an area consumption of 125465.80 µm^2 and power consumption of 97.8062 mW.