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Video s3
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    Presenter(s)
    Zihao Xuan Headshot
    Display Name
    Zihao Xuan
    Affiliation
    Affiliation
    University of Science and Technology of China
    Country
    Author(s)
    Display Name
    Zihao Xuan
    Affiliation
    Affiliation
    University of Science and Technology of China
    Display Name
    Yue Zhang
    Affiliation
    Affiliation
    University of Science and Technology of China
    Display Name
    Yuan Li
    Affiliation
    Affiliation
    University of Science and Technology of China
    Display Name
    Chang Liu
    Affiliation
    Affiliation
    University of Science and Technology of China
    Display Name
    Yi Kang
    Affiliation
    Affiliation
    University of Science and Technology of China
    Abstract

    In this paper, we novel proposed the HPSW-1T1R array to implement hybrid precision Signed-Weight MAC Operation without additional ReRAM array overhead. HPSW-1T1R array can improve the integration by reducing the effects of IR drop and transistor errors at the array level. We demonstrated HPSW-CIM architecture to achieve energy-efficient computing by improving computing density and integration. Simulation shows HPSW-CIM outperforms the state-of-the-art in array computing density and integration while maintaining outstanding energy efficiency.

    Slides
    • HPSW-CIM: A Novel ReRAM-Based Computing-in-Memory Architecture with Constant-Term Circuit for Full Parallel Hybrid-Precision-Signed-Weight MAC Operation (application/pdf)