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Video s3
    Details
    Presenter(s)
    Chehaitly Mouhamad Headshot
    Affiliation
    Affiliation
    ISEN
    Country
    Country
    France
    Author(s)
    Affiliation
    Affiliation
    ISEN
    Display Name
    André Lalevee
    Affiliation
    Affiliation
    ISEN
    Display Name
    Thibault Napoleon
    Affiliation
    Affiliation
    ISEN
    Display Name
    Maher Jridi
    Affiliation
    Affiliation
    ISEN
    Abstract

    We proposes in this work a generic parallel/pipeline architectures with and without memory based on dual direction (by columns then by rows) or two levels of data flow oriented in IIM computing architecture. An interesting characteristic of the proposed architectures is the genericity of the calculation, according to the degree of parallelism (the maximum column size and the maximum row size that can be calculated in a clock cycle), the quantization of image values, on the one hand and on the other hand these architectures can be used in two functional modes.

    Slides
    • High-Speed and Low-Area Implementations of a Generic and Parallel Integral Image Architecture (application/pdf)