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- Affiliation
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AffiliationNational Institute of Technology Calicut
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This paper presents a CMOS active pixel sensor circuit that ensures high linearity in a voltage-mode readout while exhibiting improved small-signal gain and process tolerance. The proposed circuit results in a maximum nonlinearity of 0.00013% only in a 180 nm CMOS process while operating in TT corner, which is four and three orders smaller than an NMOS-input source follower and a 5-T OTA buffer, respectively. The small signal voltage gain of our circuit is almost unity and around 25% higher than the NMOS-input source follower. The proposed circuit exhibits the least variation in its small-signal gain and linearity across corners compared to the source follower and the 5-T OTA buffer. The improvement is mainly due to the negative feedback employed in the amplifier used in the proposed circuit. The paper also presents a transistor-level placement scheme that suits the column-parallel readout architecture.