A high speed, low energy dynamic comparator using current recycling approach is proposed in this paper. The current flowing through the preamplifier during the regenerative phase is sensed and added to the regenerative nodes for high speed operation. The increment in power is further compensated using additional clock signal to prevent the full discharge of output nodes of the preamplifier. The comparator is designed and simulated in UMC 180 nm CMOS process at 1.8 V power supply.