In this paper, an architecture to implement horizontal layered Gallager E is proposed to decode QC-LDPC codes onto Field-Programmable Gate Array (FPGA). It arises as an attractive solution for wireless optical up-link space communication because of its low hardware complexity considering constraints in space. Very high throughput of several Gpbs is aimed. Moreover, at this bit rate, space systems imply hard inputs for the decoding process. Gallager E implementation represents an efficient trade-off between throughput, error correction capability and computational complexity. More than 1.5 Gbps are reached by the proposed decoders onto a Xilinx space-grade FPGA. One can note that higher throughput (3 Gbps) can be achieved on other recent FPGAs with increased working frequency.