A detailed review on multiple challenges in the design of hardware acceleration catering to healthcare applications is presented in this paper. A wide range of generalized novel architectures and devices offers certain distinct advantages over the conventional processing units. Despite this development, the power and resource constraints of these platforms create significant hindrances in the acceleration of these high-risk medical applications. An elaborate analysis of the range of solutions to overcome these obstacles as well as a perspective on the need to address reliability and security concerns are presented. An alternative correct-by- construction accelerator design methodology is also proposed.