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Video s3
    Details
    Presenter(s)
    Thao Nguyen Headshot
    Display Name
    Thao Nguyen
    Affiliation
    Affiliation
    National University of Singapore
    Country
    Author(s)
    Display Name
    Thao Nguyen
    Affiliation
    Affiliation
    National University of Singapore
    Affiliation
    Affiliation
    National University of Singapore
    Display Name
    Xuanyao Fong
    Affiliation
    Affiliation
    National University of Singapore
    Abstract

    In this paper, we report on the design of a neuromorphic co-processor on a Field Programmable Gate Array (FPGA) platform that is capable of emulating Spiking Neural Networks (SNNs) with support for unsupervised learning. One defining feature of our design is that the SNN configuration is defined entirely in the software executed by our neuromorphic co-processor. Evaluation on the FPGA platform shows that our design consumes a small amount of hardware resources and on-chip memory storage (438.75 kB). In addition, the inference and the on-chip learning in a deep convolutional SNN emulated on our FPGA implementation are 10x and 9.5x faster than the implementation on high performance x86 CPU. Moreover, we demonstrate the ability of our neuromorphic co-processor to perform the on-chip learning on an object recognition task (based on the Caltech-101 dataset) without accuracy degradation compared to the baseline implementation.

    Slides
    • An FPGA-Based Co-Processor for Spiking Neural Networks with On-Chip STDP-Based Learning (application/pdf)