Details
Presenter(s)
Display Name
Yang Li
- Affiliation
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AffiliationUniversity of Electronic Science and Technology of China
- Country
Abstract
The proposed LDO uses folded cascode error amplifier, variable bias and transient-boost capacitance to achieve good transient response: 190/143 mV undershoot/overshoot and 135 ns settling time with zero load capacitance for 20 to 80 mA load step in 1 ns edge-time. And it achieves a PSR of 68.3dB and 51.4dB at 10kHz and 1MHz.