This paper presents a hardware-efficient Saturation-Aware Compressed Sensing (SA-CS) encoder design exploiting saturation arithmetic based accumulator architecture. The SA-CS encoder design can handle saturated measurements when a low-bitwidth accumulator is employed, thereby a saturation rejection CS recovery algorithm can be adopted to achieve successful signal reconstruction. Both optimal measurement bitwidth and measurement compensation will be investigated with respect to the saturation probability and the overall hardware cost. We implemented the proposed SA-CS encoder for ECG signal processing using the MIT-BIH Arrhythmia database. With a 13-bit measurement bitwidth, the proposed SA-CS encoder achieves 21.1% and16.9% area and power reduction as compared to a standard CS encoder design.