Soft-output decoder is of great importance to be applied in iterative receivers, of which belief propagation (BP) algorithm has been widely studied for 5G low-density parity- check (LDPC) and polar codes. However, for polar codes, BP decoding suffers from high computational complexity and unsatisfactory convergence. To this end, soft cancellation (SCAN) polar decoder has recently drawn attention from academia and can be further improved by using the bit-flipping strategy. Limited by the serial nature of message propagation, the SCAN flip (SCANF) decoder cannot meet a high throughput. In this paper, we accelerate the decoding speed by the fast processing mechanism, conducting Fast-SCANF decoder. The corresponding hardware architecture is designed with memory optimization and implemented by TSMC 40nm technology, delivering a 2.1 Gbps throughput and 65 pJ/b energy. To the knowledge of authors, this is the first SCANF hardware decoder.