This work presents an exponential function by Taylor Series with a variable input range and a small LUT, with only 8 bytes. The architecture proposal has 16 bit-input, with 8 bits in the fraction length, and the output is 32 or 64-bit with different fraction lengths. The work employs a Newton-Raphson divider and a radix-4 Squarer Unit. A range of input values between (-7 to 11) for an output error of around 2% of MRED has a power consumption of 5.22pJ/op energy per operation for 32-bit output. With 64-bit output, the energy per operation result is 16.24pJ/op being able to process a more expansive range of input (-14 to 22) for an output error of around 2.6% of MRED.