This paper presents a fully-integrated reconfigurable dual-ring switched-capacitor (DRSC) converter that overcomes the coarse output voltage resolution limitation of traditional switched-capacitor (SC) converters. The proposed DRSC converter cascades multiple stages of SC cells and achieves a fine voltage conversion ratio resolution from 1/n to (n-1)/n, where n is the number of phases. To improve efficiency, the bottom-plate parasitic loss is mitigated by the charge redistribution technique. Also, the power switches are divided into several segmentation groups to reduce the output ripple with different loads. This work is designed in a 180 nm CMOS process with 30 cascaded reconfigurable SC power cells. It achieves a wide output voltage range of 0.5-3.3V from a battery input voltage (2.7-4.2V). The load regulation is implemented with a pulse-frequency modulation (PFM) control. The simulated peak efficiency is 78%, with a load current range of 0 to 20mA, using 1.5-nF on-chip capacitors in total.