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Video s3
    Details
    Presenter(s)
    Naoko Misawa Headshot
    Display Name
    Naoko Misawa
    Affiliation
    Affiliation
    University of Tokyo
    Country
    Author(s)
    Display Name
    Naoko Misawa
    Affiliation
    Affiliation
    University of Tokyo
    Display Name
    Kenta Taoka
    Affiliation
    Affiliation
    University of Tokyo
    Display Name
    Chihiro Matsui
    Affiliation
    Affiliation
    University of Tokyo
    Display Name
    Ken Takeuchi
    Affiliation
    Affiliation
    University of Tokyo
    Abstract

    In this paper, domain specific ReRAM-based Computation-in-Memory (CiM) design for simulated annealing (SA) is proposed. This paper reveals that the influence of bit precision and memory cell errors of ReRAM CiM on the accuracy for SA depends on the domains of combinatorial optimization problems, such as Max-Cut and Knapsack problems. It is found that Max-Cut problem has smaller circuit structure and is 3-bit higher tolerant of bit precision, but 4% lower bit-error rate (BER) tolerant, compared with Knapsack problem. By considering the requirements of bit precision and BER from each domain, the proposed domain specific ReRAM CiMs are best optimized.

    Slides
    • Domain Specific ReRAM Computation-in-Memory Design Considering Bit Precision and Memory Errors for Simulated Annealing (application/pdf)