As with many circuit building blocks, a digital-to-analog converter (DAC) can directly highlight the strengths and weaknesses of its constituent transistors. In this paper, a new zero-cost middle-voltage transistor is proposed by reusing already existing process steps and photomasks in an embedded non-volatile memory CMOS technology. Special attention is given to the matching performance of this new transistor. It is benchmarked against existing transistors of the technology, first at the transistor level, and then at the circuit level using a simple DAC structure. DAC-related measurements such as linearity error are compared to the more traditional method of measuring transistor matching performances. Experimental results show better matching performance for our new zero-cost transistor than the existing high-voltage device available in the technology but not optimized for analog applications. A strong link is observed between the transistor level matching performance and the DAC linearity.