This paper presents a 12-bit segmented digital-to-analog converter (DAC) with small size high linearity non-cascoded current cells. A pre-distortion calibration technique, using a low-complexity lookup table, is proposed to cancel the third order code-dependent nonlinearity induced by low output impedance of unary current cells. Based on a detailed mathematical analysis, the coefficients of the digital pre-filter are deducted. In addition, the body biasing technique in 22FDX technology is employed to adaptively tune the back-gate voltage of each current source via an auxiliary DAC to reduce mismatch errors. The current-steering (CS) DAC achieves >74dBc spurious-free dynamic range (SFDR) and >11 effective number of bits (ENOB) over the entire Nyquist bandwidth at 1GS/s and across process and temperature corners. The implementation enables a small area and compact layout of the unary cells, low-power consumption from a dual 0.8/1.2V power supply and a 1-Vppd output signal swing without the use of cascode structures.