An input-decimation technique for RDFT/RIDFT algorithm is proposed for the high-speed broadband communication systems. The input-decimation approach is presented to decrease the number of input sequences for the recursive filter so that the computation cycle of RDFT/RIDFT can be shortened to 3(N^2)/16, where N is the size of DFT. Therefore, the presented RDFT/RIDFT design can be used to beamforming tracking for OFDM receiver. Finally, the physical implementation show that the core area is 0.37x0.37 mm$^2$ with 0.18 um CMOS process. The power consumption is 5.16 mW with the supply voltage of 1.8 V and the operating clock of 40 MHz.