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    Details
    Author(s)
    Display Name
    Chao Rong
    Affiliation
    Affiliation
    Carnegie Mellon University
    Affiliation
    Affiliation
    Carnegie Mellon University
    Display Name
    Richard Carley
    Affiliation
    Affiliation
    Carnegie Mellon University
    Abstract

    This paper proposes a deep RL framework for high-dimensional circuit linearization with an efficient exploration strategy leveraging a scaled dot-product attention scheme and search on the replay technique. As a proof of concept, a 5-bit digital-to-time converter (DTC) is built as the environment, and an RL agent learns to tune the calibration words of the delay stages to minimize the integral nonlinearity (INL) with only scalar feedback. Our results show that the proposed RL framework can reduce the INL to less than 0.5 LSB within 60, 000 trials, which is much smaller than the size of searching space.