Previous RRAM-based computing-in-memory works mainly focus on the current-domain approach. However, the performance and accuracy of current computation are limited by large read currents of RRAM cells and their variations. This work presents a novel RRAM-based charge-domain computation design C-RRAM to resolve these limitations. Specifically, each RRAM cell is used to control the discharging of a capacitor through an additional transistor. The resistance variations can be tolerated with sufficient discharging time. Also, the output from each cell is accumulated by charge sharing instead of summing currents to eliminate the static current path in readout circuits. In this way, robust and efficient RRAM-based CIM operation is enabled with fully input parallelism. A 512×514 RRAM array is implemented to evaluate the benefits of the proposed charge-domain approach. The experiment results show that C-RRAM can suppress the output variations by 41× and incur negligible accuracy loss for ResNet-18 on Cifar10 dataset. Compared to previous current-domain RRAM designs, it achieves 1.2× energy efficiency and 127× area efficiency due to reduced A/D conversions and improved parallelism.