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Presentations
Characterizing the Communication Requirements of GNN Accelerators: A Model-Based Approach
Presented Date:Jul 07, 01:26pm UTCPresenter(s): Robert Guirado
A Novel DRAM Architecture for Improved Bandwidth Utilization and Latency Reduction Using Dual-Page Operation
Presented Date:Jul 07, 01:26pm UTCPresenter(s): Chirag Sudarshan
An Ultra-Low Leakage Bitcell Structure with the Feedforward Self-Suppression Scheme for Near-Threshold SRAM
Presented Date:Jul 07, 01:26pm UTCPresenter(s): Hao Zhang
67.5-fJ Per Access 1-Kb SRAM Using 40-nm Logic CMOS Process
Presented Date:Jul 07, 01:26pm UTCPresenter(s): Chien-Ping Kuo
BER Evaluation System Considering Device Characteristics of TLC and QLC NAND Flash Memories in Hybrid SSDs with Real Storage Workloads
Presented Date:Jul 07, 01:26pm UTCPresenter(s): Ken Takeuchi
Chairs
Chair(s)
![Boris Vaisband Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/10891.jpg?h=a427ed6f&itok=dFDhUjMh)
Display Name
Boris Vaisband
- Affiliation
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AffiliationMcGill University
- Country
![Seok-Bum Ko Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/Seokbum_Ko.jpg?h=82f92a78&itok=4MQyr22z)
Display Name
Seok-Bum Ko
- Affiliation
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AffiliationUniversity of Saskatchewan
- Country