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Video s3
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    Presenter(s)
    Bojun Hu Headshot
    Display Name
    Bojun Hu
    Affiliation
    Affiliation
    University of Electronic Science and Technology of China
    Country
    Author(s)
    Display Name
    Bojun Hu
    Affiliation
    Affiliation
    University of Electronic Science and Technology of China
    Display Name
    Sanfeng Zhang
    Affiliation
    Affiliation
    University of Electronic Science and Technology of China
    Display Name
    Xiong Zhou
    Affiliation
    Affiliation
    University of Electronic Science and Technology of China
    Display Name
    Zehao Li
    Affiliation
    Affiliation
    University of Electronic Science and Technology of Chin
    Display Name
    Xiangxin Pan
    Affiliation
    Affiliation
    University of Electronic Science and Technology of China
    Display Name
    Zhaoming Ding
    Affiliation
    Affiliation
    University of Electronic Science and Technology of CN
    Display Name
    Qiang Li
    Affiliation
    Affiliation
    University of Electronic Science and Technology of China
    Abstract

    A comparator speed enhancement technique for SAR ADC under near- and sub-threshold supply voltages has been introduced in this work. The proposed delayed cross-coupling comparator improves the comparator speed without degrading the noise performance. After post-layout simulation, the SAR ADC using this comparator technique has achieved 0.35V 8bit 12MS/s performance indicators in 65nm CMOS technology. The simulation results prove that the proposed delayed cross-coupling comparator effectively improves the speed in Near- and Sub-Threshold ADCs.

    Slides
    • A Comparator Speed Enhancement Technique for Near- and Sub-Threshold ADCs (application/pdf)