Details
Presenter(s)
![Bojun Hu Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/13151_0.jpg?h=9ea14e7a&itok=4R7ldC_f)
Display Name
Bojun Hu
- Affiliation
-
AffiliationUniversity of Electronic Science and Technology of China
- Country
Abstract
A comparator speed enhancement technique for SAR ADC under near- and sub-threshold supply voltages has been introduced in this work. The proposed delayed cross-coupling comparator improves the comparator speed without degrading the noise performance. After post-layout simulation, the SAR ADC using this comparator technique has achieved 0.35V 8bit 12MS/s performance indicators in 65nm CMOS technology. The simulation results prove that the proposed delayed cross-coupling comparator effectively improves the speed in Near- and Sub-Threshold ADCs.