This paper presents the analysis, design, and measurements of a compact analog frontend for a catheter-integrated ultrasound digitizer. The frontend requires single-ended-to-differential conversion, AC coupling, amplification, anti-aliasing, and the capability to drive an ADC. To minimize chip area and maximize power efficiency, a 2-stage frontend using self-biased inverter-based amplifiers was designed. The measured prototype in 40nm CMOS offers gain of up to 15dB and bandwidth up to 20MHz, while consuming up to 162μW from a 1.1V supply. The FoM of 158dB and chip area of 0.0054mm² are in line with state-of-the-art filters, while the design includes the aforementioned extra functionalities.