In this paper, a CMOS integrated impedance to frequency converter for electric cell-substrate impedance sensing (ECIS) is developed. The design consists of low-power current comparators and an SR-Latch for resistance to frequency and voltage comparators, XOR, and SR-Latch for capacitance to frequency conversion. Experimental results in a 180nm process show a power consumption of 16 uW and area of 300 microns squared. The resolution of the system is 0.8ohm over a resistance range of 1 ohm to 10 kohm. The estimated error is 0.4% for capacitance and 0.1% for resistance.