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Video s3
    Details
    Presenter(s)
    kazi ibrahim Headshot
    Display Name
    kazi ibrahim
    Affiliation
    Affiliation
    Katholieke Universiteit Leuven
    Country
    Author(s)
    Display Name
    kazi ibrahim
    Affiliation
    Affiliation
    Katholieke Universiteit Leuven
    Display Name
    Patrick Reynaert
    Affiliation
    Affiliation
    Katholieke Universiteit Leuven
    Display Name
    Wim Dehaene
    Affiliation
    Affiliation
    Katholieke Universiteit Leuven
    Abstract

    A phase rotator based architecture for clock recovery is presented for NRZ wireline links. A slow wave transmission line is used as a spatial buffer. The system is implemented in 40nm CMOS. It has a wide range of flexibility in recovering clocks continuously from 4GHz to 23GHz in presence of frequency offset between transmitter and receiver. The concept of using a transmission line as a spatial buffer is proven.

    Slides
    • Clock Recovery Circuit Using a Transmission Line as a Delay Element from a 100Gb/s Bit Stream (application/pdf)