We present a low phase noise 4.5-to-6.5GHz injection-locked oscillator-based frequency tripler from an ultra-low jitter 1.5-to-2.16GHz clock source. Class-C biasing is employed in the digitally controlled LC oscillator and the injection circuit to simultaneously achieve low phase noise in the oscillator and improve the third harmonic injection strength. Fabricated in a 0.13um BiCMOS process, the ILT has a jitter tracking bandwidth of 25MHz for sub-harmonic injection. The ILT demonstrates good sub-harmonic rejection ratios SHRR1 and SHRR2 as 48dB and 58dB, respectively. The ILT adds 15fs additional rms jitter to an input clock source with rms jitter of 68fs.