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Video s3
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    Presenter(s)
    Jill C. Mayeda Headshot
    Display Name
    Jill C. Mayeda
    Affiliation
    Affiliation
    Texas Tech University
    Country
    Abstract

    Several broadband medium-power millimeter-wave power amplifiers (PAs) are designed using a 22-nm FD-SOI CMOS technology. An adaptive biasing network is utilized for improving the power-added-efficiency (PAE) at power backoff. We first designed a fixed-biased PA that achieves 20.0 – 47.0 GHz 3-dB BW, with maximum PAE = 36.7%, P1dB = 14.3 dBm, PAE @P1dB = 14.1%, and Psat of 17.2 dBm at 24 GHz according to post-layout parasitics extracted (PEX) simulations. An adaptive biasing circuit is then added to the fixed-bias PA to improve PAE at power backoff, where it achieves similar performance in PEX simulations in BW, maximum PAE, P1dB, and Psat; however, its PAE at P1dB is greatly improved to 29.2%. The improvement of PAE@P1dB is seen across the full 20 – 40 GHz frequency band. In addition, two different ESD protection designs are studied. All of these PAs achieve 3-dB absolute BW of ~80% with high maximum PAE and PAE@P1dB, as well as the smallest PA core size compared with the literature, and thus may be attractive for multiband mm-Wave 5G and other broadband mm-Wave applications.

    Slides
    • Broadband Millimeter-Wave 5G CMOS Power Amplifiers with High Efficiency at Power Backoff and ESD-Protection in 22nm FD-SOI (application/pdf)