Approximate Computing has paved way for elaborate savings in design area and latency of modern system architectures, by a deliberate yet tolerable loss of functional accuracy. This paper thus proposes a design of an approximate multiplier based on the efficient Toom-Cook algorithm. Inherent integer divisions in the algorithm has restricted its feasibility in hardware, unless without suitable approximation. On an average, the proposed multiplier achieves 53%, 18% and 57% improvements in area, delay and power only with less than 1% mean error. Also, the efficacy of the multiplier is tested well in the epoch extraction system for speech processing.