In this paper, we propose an annealing processor based on a fully-connected Ising model with 1024 spins. A modified Ising model annealing algorithm is proposed for faster convergence and more efficient implementation. An interleaved algorithmbased random sequence generator is designed to convert the annealing schedule with large bit width into several bits shift value and thus save storage area. A multi-spins pseudo parallel update circuit is proposed to address the contradiction between spins parallel update and non-convergence, which greatly reduces annealing time