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Video s3
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    Presenter(s)
    Vivek Saraswat Headshot
    Display Name
    Vivek Saraswat
    Affiliation
    Affiliation
    Indian Institute of Technology Bombay
    Country
    Author(s)
    Display Name
    Shreyas Deshmukh
    Affiliation
    Affiliation
    Indian Institute of Technology Bombay
    Display Name
    Vivek Saraswat
    Affiliation
    Affiliation
    Indian Institute of Technology Bombay
    Affiliation
    Affiliation
    GlobalFoundries
    Display Name
    Rajesh Nair
    Affiliation
    Affiliation
    GlobalFoundries
    Display Name
    Laxmeesha S
    Affiliation
    Affiliation
    Indian Institute of Technology Bombay
    Affiliation
    Affiliation
    Indian Institute of Technology Bombay
    Display Name
    Udayan Ganguly
    Affiliation
    Affiliation
    Indian Institute of Technology Bombay
    Abstract

    Conductive-Bridge RRAM (CBRAM) is being developed to meet reliability specifications by GlobalFoundries for typical digital storage. Filamentary growth and rupture produce variability. We explore whether digital-storage-focused CBRAM can support analog current readout-based Multiply-and-Accumulate operations to enable artificial neural network applications. We explore the 2T-1R bit cell with experimental CBRAM data and GlobalFoundries’ 22FDX platform to demonstrate > 𝟐 × reduction in HRS and LRS logscale variability and > 𝟏𝟎 × higher HRS/LRS ratio. The strategy is tested for MNIST and FMNIST using system-level modeling of non-idealities. Such bit-cell design principles have general utility in exploiting variability-prone characteristics of emerging memories.