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Presenter(s)
![Peng Chen Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/12301.jpg?h=90e62583&itok=QByEyo6D)
Display Name
Peng Chen
- Affiliation
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AffiliationLund University
- Country
Abstract
This work analyzes the nonlinear effects in the track and hold circuit applied in high-speed ADCs or RF sampling receiver (RX) front-ends. Non-ideal effects inside the main sampling NMOS switch are studied. Parasitic varactor and sampling on-resistance modulation effects are analyzed through frequency domain Volterra series and the EKV MOS transistor model. Polynomial curve fitting is applied showing that the on-resistance modulation dominates. Finally, a novel bootstrap circuit is proposed with a fast settling time and high bootstrap voltage in a 22,nm FD-SOI CMOS technology, with its setting time analyzed using the Elmore delay model.