Reliable programming crossbar memristors to the required resistive states is the challenge that hinders VLSI deployment of the memristive neural network circuits, as current memristive devices face the variability issues of resistive switching. There is also a need for on-chip control circuitry that detects malfunctioning memristive nodes in the crossbar due to the memristor aging. Program and Verify (P&V) schemes can be used for both controlling resistive switching as well as evaluating the functionality of memristors. In this paper, we propose a novel analog circuit design for the P&V approach of row-by-row programming bipolar memristors in a 1T1M crossbar configuration. The proposed control circuit (CC) is self-timed and performs both read and program operations, decreasing the overall programming complexity. CC design is verified with Spice simulations using low power 22nm high-k CMOS models and Modified S memristor model for large scale simulations. Parasitic of wire lines under thermal variation and CMOS variability were included for programming 1T1M crossbar partitions of the sizes 16×16,32×32, 64×64, 128×128.