This paper proposes an all-digital bi-directional gated ring oscillator (BDGRO) time integrator for mixed-mode signal processing. The proposed time integrator features full compatibility with technology scaling, rapid integration, ultra-low power consumption, a virtually unlimited dynamic range, a small silicon area, built-in dynamic element matching, and self-digitization. An ultra-low power high-speed bi-directional gated delay line (BDGDL) up/down counter is also proposed as part of the time integrator. The time integrator is designed in a TSMC 130 nm 1.2 V CMOS technology and analyzed using Spectre with BSIM4 device models. Operated at 20 MS/s, the time integrator consumes only 0.25 mW with a gain of 16.48 dB.