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Abstract
To achieve unprecedented throughput and efficiency, 5G and 6G networks will leverage parallel communication over multiple spatial channels under the massive MIMO framework. The main limitation of MIMO is its heavy load of matrix operations, a task for which von Neumann-based computers are unoptimized. In-memory computing (IMC) solves the bottleneck by performing computation directly within the memory. We provide experimental validation of a closed-loop IMC (CL-IMC) system on a 90 nm CMOS integrated circuit for zero-forcing and regularized-zero-forcing decoding on a 14×7 MIMO link. Hardware demonstrations show 99.91% accuracy, supporting CL-IMC as a promising candidate for data processing in next-generation cellular networks.