This paper presents a SAR-based TI-ADC for multi-standard wireless receivers with a maximum sampling rate of 900MS/s, programmable interleaving factor from 2 to 6 in steps of one, and on-chip background calibrations of inter-channel offset, gain, and clock skew mismatches. In particular, the proposed difference-based skew calibration technique efficiently operates in any configuration, not being limited to power-of-2 interleaving factors. Fabricated in a 28-nm bulk CMOS process, the presented TI-ADC achieves a Nyquist-frequency SNDR and SFDR of 52.01dB and 58.82dBc at 900MS/s, respectively, dissipating 42.96mW and with an active area of 0.48mm2.