This paper proposes an iterative non-binary LDPC decoder based on the 5G base matrices and quantifies its impact in terms of performance and complexity. We construct NB-LDPC matrices devised directly from the 5G base matrices. Subsequently, we develop an iterative decoding scheme which facilitates parallelism and offers high performance. BER plots reveal a 0.5 dB performance gain in comparison with Min-sum algorithm. Furthermore, synthesis results for 45-nm ASIC technology demonstrate our architecture’s throughput rate and area requirements. Τhe proposed architecture, because of its independence on the lifting size factor, offers higher throughput than the binary ones in certain cases. Also, as Galois Field rank increases, throughput rate increases too. Finally, the throughput and area results show that the proposed architecture is suitable for small lifting size factors.