Details
Presenter(s)
![Ziwei Li Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/17201.jpg?h=5e938d19&itok=Qs8lWz3b)
Display Name
Ziwei Li
- Affiliation
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AffiliationBeijing Jiaotong University
- Country
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CountryChina
Abstract
This work faces to the always-on battery-powered IoT devices. In this paper, a new Senputing architecture is proposed to reduce the power bottleneck of A/D conversion and data transmission by combining imaging and BNN 1st-layer feature map computation. Senputing has two working modes, Normal-Sensor mode and Direct-Photocurrent-Computation mode with different resolutions (128×128 and 32×32). Besides, an ultra-low-power CIS chip with Senputing architecture is proposed. Our CIS chip is simulated with 180nm CMOS technology, the power of feature map computation is 5.9µW, and the frame rate is 208fps. The computation efficiency reaches to 8.23TOPs/W, which is 10.1× higher than previous works.