Details
Presenter(s)
![Wei Zhu Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/70861.jpg?h=ad518777&itok=-BF4X_sF)
Display Name
Wei Zhu
- Affiliation
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AffiliationKatholieke Universiteit Leuven
- Country
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CountryBelgium
Abstract
This paper presents an integrated synchronous gate driver with complementary slope sensing zero voltage switching detector and high voltage level shifter to enable phase-shifted full-bridge dc-dc converters with ZVS. The proposed CSSZVSD not only achieves a higher efficiency by minimizing the reverse conduction loss and the switching loss of the power FETs but also eliminates the converter potential short-circuit risk. The proposed HVLS in the gate driver with dynamically tailed current and noise cancellation block improves the driver efficiency and enhances the converter reliability.