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![Sanjeev T Chandrasekaran Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/18111.jpg?h=80513b49&itok=rxKZvxJn)
- Affiliation
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AffiliationUniversity at Buffalo
- Country
This work presents a true random number generator (TRNG) that uses noise and jitter in a continuous-time, delta-sigma modulator (CTDSM) as an entropy source. A multi-bit non-return- to-zero (NRZ) feedback digital-to-analog converter (DAC) ensures that input swing seen by the front-end integrators is small and dominated by CTDSM noise and jitter, thus allowing the proposed circuit to simultaneously operate as both CTDSM and TRNG which is a key differentiation of this work compared to state-of-the-art TRNGs. Voltage-controlled ring oscillators are used to implement integrators in the proposed CTDSM. Fabricated in 65nm CMOS, the TRNG has an energy efficiency of 3pJ/bit at a throughput of 33Mbps and 3.5pJ/bit at 200Mbps, and passes all NIST tests with a minimum pass rate > 0.96. The measured minimum entropy of the TRNG bits is > 0.9995 across multiple chips and voltage/temperature corners without any calibration.