This work proposes an energy-efficient and highly-accurate multi-bit input-parallel CIM processor with four key features: 1) a 10T2C signed magnitude cell with voltage-capacitance-ratio (VCR) decoding for multi-level inputs with only 2-level supply voltages, 2) a computation word line (CWL) charge reuse method for input driver power reduction, 3) a signal-amplifying noise canceling voltage-to-time converter (SANC-VTC) for SNR improvement, and 4) a distribution-aware time-to-digital converter (DA-TDC) for ADC power reduction. As a result, it achieves 4.85 mW power consumption and 332 TOPS/W energy efficiency with 72.43% benchmark accuracy.