Details
Presenter(s)
Display Name
Yisong Kuang
- Affiliation
-
AffiliationPeking University
- Country
Abstract
In this paper, we introduce a spike-based neuromorphic processor developed for efficient implementations for various neural networks including ANNs and SNNs. Based on spatio-temperal coding scheme and combinable dendrites, the chip supports input, output and weight precision between 1 bit and 8 bits, with a maximum fan-in of 72 K per neuron. The chip is implemented in 28-nm CMOS, with an energy efficiency of 0.34pJ/SOP.