This paper presents an ultralow power-consumption, high data-rate continuous-phase frequency-shift-keying (CPFSK) transmitter. The TX consists of a high-speed digitally controlled oscillator, PRBS generator, a wideband input clock buffer and CML-to-CMOS converter. The DCO is used to generate two carrier frequencies. High quality-factor inductors and capacitors are deliberately implemented to achieve a low-power DCO and a high-speed switch used for CPFSK modulation is designed to support high data rate. A half-rate, fully-differential PRBS generator with asynchronous XOR is also integrated for the testing purpose. The TX has been implemented in TSMC 65nm CMOS and the chip size is $0.8,text{mm}times 0.6,text{mm}$. The highest data rate of 16Gbps is measured in the frequency domain. DC power consumption of 19.6mW from a 1.2V supply voltage is measured without the PRBS generator leading to an energy efficiency per bit of 1.225pJ/bit indicating the efficiency of the TX. Due to its low power consumption and high data rate, the proposed TX is suitable for indoor short-range wireless communication and could also be adapted for future 6G mobile communication.