A real-time dense 3D reconstruction on lightweight AR headsets is challenging since its memory access surpasses the available memory bandwidth. The proposed processor integrates two key building blocks – Dilation-based TSDF (D-TSDF) fusion and Block-Projection (BP) engine. D-TSDF projects the depth map in pixel-to-voxel coordinate transformation and dilates it, leading to 96.61% EMA reduction. Second, a BP engine compresses occupancy grid by decomposing it into 2D, 1D vectors, achieving ×166.09 reduced memory bandwidth. The proposed processor is implemented in 28nm CMOS technology occupying 1.27 mm2 area. As a result, 96.45 fps 3D reconstruction is possible while consuming 15.94 mW power.