This paper presents a 134-154 GHz low-noise amplifier (LNA) designed in 28-nm bulk CMOS. The optimized transistor layout has been utilized to reduce the noise figure (NF) and boost the power gain in D-band (110-170 GHz). A 3-coil transformer-based input matching network with gm-boosted common-gate topology is adopted to further reduce the NF. The transformer-based magnetically-coupled resonator matching networks are used to improve the gain flatness and enhance the bandwidth. Post-layout simulation results show that the LNA achieves a maximum power gain of 36.3 dB and a minimum NF of 3.8 dB. The -3-dB and -1-dB bandwidth of the proposed LNA are 20 GHz and 15 GHz, respectively. The LNA consumes 25.4-mW dc power with a supply voltage of 1 V and occupies an area of 0.46 × 0.74 mm2.