In this paper, a full-digital heartbeat detection system-on-chip (SoC) with low-noise analog front end (AFE)is presented. With the use of transconductance bootstrap and source degradation, the noise of AFE can be greatly reduced. The SoC is implemented in a 0.18µm CMOS process and consumes 1.2µW from a 1.2V supply, of which AFE and heart rate detector consume 0.8 µW and 0.4 µW, respectively. Besides, the noise from 1Hz to 1kHz is only 1.7 µVrms. The gain of instrument amplifier is 33dB, and the cutoff frequency of high and low frequency are 0.4Hz and 40kHz respectively.