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Video s3
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    Presenter(s)
    Mingxuan Liang Headshot
    Display Name
    Mingxuan Liang
    Affiliation
    Affiliation
    Tsinghua University
    Country
    Abstract

    In this paper, we implement a single-spike spiking neural network (SNN) accelerator on field programmable gate array (FPGA) with 512 hidden neurons. A single-spike spiking integrate-and-fire neural model is adopted, which emits only one spike during classification, and adder instead of multiplier is used to integrate input spikes in its implementation, consuming fewer power and area compared with other models. Different level sparse connection is adopted to reduce up to 75% weight memory with 0.016% overhead for storing connections. The SNN accelerator is verified by MNIST handwriting dataset with Xilinx VC707 FPGA. Results show that the single-spike SNN accelerator reached 96% accuracy, 2.8us classification latency and 1.13μJ/classification energy efficiency with MNIST dataset.

    Slides
    • A 1.13µj/Classification Spiking Neural Network Accelerator with a Single-Spike Neuron Model and Sparse Weights (application/pdf)