Details
Presenter(s)
Display Name
Hugo Vallée
- Affiliation
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AffiliationNXP Semiconductors
- Country
Abstract
This paper proposes an active mixer based on a common-gate noise canceling architecture implemented in 28nm CMOS technology. The design combines some circuit techniques and explores sub-threshold bias operation to improve the power efficiency. Dedicated to wideband applications, the mixer achieves a 800MHz to 6GHz bandwidth. In nominal mode the circuit consumes 4mW from 1.2V. It achieves a conversion gain of 15dB and a single side band noise figure (NFssb) of 6dB. In power saving mode the power consumption is reduced to 2mW, the conversion gain is 11dB and the NFssb is 7.2dB. For the two mode of operation, the IIP3 is respectively -1dBm and +0.5dBm.