This paper describes a 108 mega pixels (Mp) CMOS image sensor (CIS) for mobile phone applications. The 0.7 um-pitch pixel array (12000×9000) is composed of plenty of nona-cells, which is 3×3 unit pixel structure with binning capability for maximum light absorption. To suppress horizontal noise (HN) source, an ADC decision-feedback technique is proposed to minimize the variation of the current consumption. Furthermore, with the decision-feedback loop, which is implemented in the each comparators of the ADC array, analog power consumption can be also reduced. Top pixel and bottom digitizer chips were fabricated in 65 nm and 28 nm process technology, respectively. The measurement results of the 3-D stacked prototype imager show an input-referred random noise (RN) of 1.4 e-rms with an analog gain of 16 and a frame rate of 10. A suppressed RN of 0.44 e-rms is also achieved with a nona-binning. The column fixed-pattern noise (FPN) of the 108 MP imager is only 66 ppm. The high-resolution image sensing system with the decision-feedback technique achieves a figure-of-merit (FoM) of 0.71 e-∙nJ.