Details
![Jinhen Lee Headshot](https://confcats-catavault.s3.amazonaws.com/CATAVault/ieeecass/master/files/styles/cc_user_photo/s3/user-pictures/10391_1.jpg?h=2c4e73f8&itok=I2VmTEBl)
- Affiliation
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AffiliationNanyang Technological University
- Country
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CountrySingapore
This paper presents an ultra-low supply 4-stage output-capacitorless low-dropout (LDO) regulator using a TSMC 40nm process. A novel frequency compensation scheme, which is called feedforward with embedded Miller-RC compensation (FEMRCC), is proposed to guarantee stability throughout the entire load range. The phase margin and gain margin are at least 45.4° and 6.5dB respectively. At a supply voltage of 0.6V, the regulator can support 0 to 150mA of load current. When the load current is stepped from 0 to 150mA, the regulator displays only a 1.5mV undershoot and 0.7mV overshoot, while consuming 39.3µA quiescent current. By utilizing a pseudo-differential cross-coupled pair as the input stage, the LDO regulator achieves a high unity gain bandwidth (UGB) of more than 24MHz. With four gain stages, the minimum DC gain is 55.2dB, ensuring excellent output regulation accuracy. The proposed design is suitable for Internet-of-Things applications with an excellent transient figure-of-merit (FoM) comparable to state-of-the-art designs.